1. Field of the Invention
The present invention relates generally to manufacturing semiconductor devices, and more specifically to use of first principles simulation in semiconductor manufacturing processes.
2. Discussion of the Background
Material processing in the semiconductor industry presents formidable challenges in the manufacture of integrated circuits (ICs). Demands for increasing the speed of ICs in general, and memory devices in particular, force semiconductor manufacturers to make devices smaller and smaller on the substrate surface. Moreover, in order to reduce fabrication costs, it is necessary to reduce the number of steps (e.g., etch steps, deposition steps, etc.) required to produce an IC structure and hence reduce the overall complexity of the IC structure and the fabrication methods thereof. These demands are further exacerbated by both the reduction in feature size and the increase of substrate size (i.e., 200 mm to 306 mm and greater) which places greater emphasis on the precise control of critical dimensions (CD), process rate, and process uniformity to maximize the yield of superior devices.
In semiconductor manufacturing, numerous steps during the evolution of ICs are employed including vacuum processing, thermal processing, plasma processing, etc. Within each processing step, numerous variables are present that affect the outcome of the process. In order to more precisely control the outcome of each processing step, the respective process tools are equipped with an increasing number of diagnostic systems (electrical, mechanical, and optical) to measure data during processing and provide an intelligent basis for correcting process variations through the actions of a process controller. The number of diagnostic systems is becoming burdensome and costly. Yet, data sufficiently resolved in space and time for complete process control is still not available.
These industry and manufacturing challenges have led to interest in more use of computer based modeling and simulation in the semiconductor manufacturing industry. Computer-based modeling and simulation are increasingly being used for prediction of tool performance during the semiconductor manufacturing tool design process. The use of modeling allows the reduction of both cost and time involved in the tool development cycle. Modeling in many disciplines, such as stress, thermal, magnetics, etc., has reached a level of maturity where it can be trusted to provide accurate answers to design questions. Moreover, computer power has been increasing rapidly along with the development of new solution algorithms, both of which resulted in reduction of time required to obtain a simulation result. Indeed, the present inventors have recognized that a large number of simulations typically done in the tool design stage can presently be run in times comparable to wafer or wafer cassette processing times. These trends have led to the suggestion that simulation capability typically used only for tool design can be implemented directly on the tool itself to aid in various processes performed by the tool. For example, the 2001 International Technology Roadmap for Semiconductors identifies issues impeding the development of on-tool integrated simulation capability as an enabling technology for manufacturing very small features in future semiconductor devices.
Indeed, the failure of industry to implement on-tool simulation to facilitate tool processes is primarily due to the need for computational resources capable of performing the simulations in a reasonable time. Specifically, the processor capabilities currently dedicated to semiconductor manufacturing tools are typically limited to diagnostic and control functions, and therefore could only perform relatively simple simulations. Thus, the semiconductor manufacturing industry has perceived a need to provide powerful dedicated computers in order to realize meaningful on-tool simulation capabilities. However, dedication of such a computer to the semiconductor processing tool results in wasted computational resources when the tool runs processes that use simple simulations, or no simulations at all. This inefficient use of an expensive computational resource has been a major impediment to implementation of simulation capabilities on semiconductor processing tools.